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author | Hans de Goede <hdegoede@redhat.com> | 2021-12-30 00:14:24 +0100 |
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committer | Hans de Goede <hdegoede@redhat.com> | 2022-01-05 11:31:18 +0100 |
commit | cd26465fbc03beaa68979c06fc983be86eafcb4b (patch) | |
tree | f8f58620daa813594a8fcf916dc1459de942c552 /tools/perf/scripts/python/exported-sql-viewer.py | |
parent | fc64a2b21603dc1e1bae6f34b4bccfadc992894f (diff) | |
download | linux-cd26465fbc03beaa68979c06fc983be86eafcb4b.tar.gz linux-cd26465fbc03beaa68979c06fc983be86eafcb4b.tar.bz2 linux-cd26465fbc03beaa68979c06fc983be86eafcb4b.zip |
platform/x86: x86-android-tablets: Add support for PMIC interrupts
The Crystal Cove PMIC has a pin which can be used to connect the IRQ of
an external charger IC. On some boards this is used so we need a way to
look this up.
Note that the Intel PMICs have 2 levels of interrupts and thus
2 levels of IRQ domains all tied to a single fwnode.
Level 1 is the irqchip which demultiplexes the actual PMIC interrupt into
interrupts for the various MFD cells. Level 2 are the irqchips used in the
cell drivers which themselves export IRQs, such as the crystal_cove_gpio
driver, which de-multiplexes the level 2 interrupts for the GPIOs into
individual per GPIO IRQs.
The crystal_cove_charger driver registers an irqchip with a single IRQ for
the charger driver to consume. Note the MFD cell IRQ cannot be consumed
directly because the level 2 interrupts must be explicitly acked.
To allow finding the right IRQ domain when looking up the IRQ for
the charger, the crystal_cove_charger driver sets a DOMAIN_BUS_WIRED token
on its IRQ domain.
Add support for looking up the IRQ from the crystal_cove_charger driver.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Link: https://lore.kernel.org/r/20211229231431.437982-6-hdegoede@redhat.com
Diffstat (limited to 'tools/perf/scripts/python/exported-sql-viewer.py')
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