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| author | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-08-09 09:03:47 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2021-08-09 09:03:47 +0200 |
| commit | bd935a7b21340e2e37f51a7f2d3188145e2fcf1f (patch) | |
| tree | ac8af4e6ea552d32839c415b2f36d416ee327ea4 /drivers/spi/spi-cadence-quadspi.c | |
| parent | 96ba6c6e8922e89ca4908c650072d8f8d7b39cbc (diff) | |
| parent | 36a21d51725af2ce0700c6ebcb6b9594aac658a6 (diff) | |
| download | linux-bd935a7b21340e2e37f51a7f2d3188145e2fcf1f.tar.gz linux-bd935a7b21340e2e37f51a7f2d3188145e2fcf1f.tar.bz2 linux-bd935a7b21340e2e37f51a7f2d3188145e2fcf1f.zip | |
Merge 5.14-rc5 into driver-core-next
We need the driver core fixes in here as well.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'drivers/spi/spi-cadence-quadspi.c')
| -rw-r--r-- | drivers/spi/spi-cadence-quadspi.c | 21 |
1 files changed, 18 insertions, 3 deletions
diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index a2de23516553..101cc71bffa7 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -325,7 +325,15 @@ static int cqspi_set_protocol(struct cqspi_flash_pdata *f_pdata, f_pdata->inst_width = CQSPI_INST_TYPE_SINGLE; f_pdata->addr_width = CQSPI_INST_TYPE_SINGLE; f_pdata->data_width = CQSPI_INST_TYPE_SINGLE; - f_pdata->dtr = op->data.dtr && op->cmd.dtr && op->addr.dtr; + + /* + * For an op to be DTR, cmd phase along with every other non-empty + * phase should have dtr field set to 1. If an op phase has zero + * nbytes, ignore its dtr field; otherwise, check its dtr field. + */ + f_pdata->dtr = op->cmd.dtr && + (!op->addr.nbytes || op->addr.dtr) && + (!op->data.nbytes || op->data.dtr); switch (op->data.buswidth) { case 0: @@ -1228,8 +1236,15 @@ static bool cqspi_supports_mem_op(struct spi_mem *mem, { bool all_true, all_false; - all_true = op->cmd.dtr && op->addr.dtr && op->dummy.dtr && - op->data.dtr; + /* + * op->dummy.dtr is required for converting nbytes into ncycles. + * Also, don't check the dtr field of the op phase having zero nbytes. + */ + all_true = op->cmd.dtr && + (!op->addr.nbytes || op->addr.dtr) && + (!op->dummy.nbytes || op->dummy.dtr) && + (!op->data.nbytes || op->data.dtr); + all_false = !op->cmd.dtr && !op->addr.dtr && !op->dummy.dtr && !op->data.dtr; |