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authorPaul M Stillwell Jr <paul.m.stillwell.jr@intel.com>2021-03-02 10:12:05 -0800
committerTony Nguyen <anthony.l.nguyen@intel.com>2021-03-31 14:21:27 -0700
commit2ec5638559c13b923250eccf495d2a033fccb3e7 (patch)
tree515ea70db5d3b952a0e045e0dce03ed504187904 /drivers/net/ethernet/intel/ice/ice_main.c
parenta05983c3d024d173af0a80dc7197a21f64d52df6 (diff)
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ice: handle increasing Tx or Rx ring sizes
There is an issue when the Tx or Rx ring size increases using 'ethtool -L ...' where the new rings don't get the correct ITR values because when we rebuild the VSI we don't know that some of the rings may be new. Fix this by looking at the original number of rings and determining if the rings in ice_vsi_rebuild_set_coalesce() were not present in the original rings received in ice_vsi_rebuild_get_coalesce(). Also change the code to return an error if we can't allocate memory for the coalesce data in ice_vsi_rebuild(). Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Tested-by: Tony Brelinski <tonyx.brelinski@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel/ice/ice_main.c')
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