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| author | Dmitry Baryshkov <dmitry.baryshkov@linaro.org> | 2021-08-05 20:08:17 +0300 |
|---|---|---|
| committer | Rob Clark <robdclark@chromium.org> | 2021-08-10 15:30:32 -0700 |
| commit | 858c595a3f5d66db1ed003fdefef374ea4a8c961 (patch) | |
| tree | 0e25a96cde6dc76af6e776784fa0206cf14fb375 /drivers/gpu/drm/msm/dsi/dsi.xml.h | |
| parent | 26ae419cd9eca4268c267a1910bdac4ae6ef4896 (diff) | |
| download | linux-858c595a3f5d66db1ed003fdefef374ea4a8c961.tar.gz linux-858c595a3f5d66db1ed003fdefef374ea4a8c961.tar.bz2 linux-858c595a3f5d66db1ed003fdefef374ea4a8c961.zip | |
drm/msm/dsi: add continuous clock support for 7nm PHY
Unlike previous generations, 7nm PHYs are required to collaborate with
the host for continuos clock mode. Add changes neccessary to enable
continuous clock mode in the 7nm DSI PHYs.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Link: https://lore.kernel.org/r/20210805170817.3337665-1-dmitry.baryshkov@linaro.org
[Fix merge conflict, and $description typo]
Signed-off-by: Rob Clark <robdclark@chromium.org>
Diffstat (limited to 'drivers/gpu/drm/msm/dsi/dsi.xml.h')
| -rw-r--r-- | drivers/gpu/drm/msm/dsi/dsi.xml.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/drivers/gpu/drm/msm/dsi/dsi.xml.h b/drivers/gpu/drm/msm/dsi/dsi.xml.h index 04b9f1c57e19..49b551ad1bff 100644 --- a/drivers/gpu/drm/msm/dsi/dsi.xml.h +++ b/drivers/gpu/drm/msm/dsi/dsi.xml.h @@ -544,6 +544,7 @@ static inline uint32_t DSI_CLKOUT_TIMING_CTRL_T_CLK_POST(uint32_t val) #define DSI_LANE_STATUS_DLN0_DIRECTION 0x00010000 #define REG_DSI_LANE_CTRL 0x000000a8 +#define DSI_LANE_CTRL_HS_REQ_SEL_PHY 0x01000000 #define DSI_LANE_CTRL_CLKLN_HS_FORCE_REQUEST 0x10000000 #define REG_DSI_LANE_SWAP_CTRL 0x000000ac |