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| author | Leo Li <sunpeng.li@amd.com> | 2018-11-01 11:10:18 -0400 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2019-01-14 15:04:41 -0500 |
| commit | 508f5fcb54f0ad3b333a835f45e109feb9edf761 (patch) | |
| tree | dbcd50971d2258e2e0133eda1d696dfb201edf6a /drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | |
| parent | 09f609c34fc8b9cb560947ab11609259f5d42889 (diff) | |
| download | linux-508f5fcb54f0ad3b333a835f45e109feb9edf761.tar.gz linux-508f5fcb54f0ad3b333a835f45e109feb9edf761.tar.bz2 linux-508f5fcb54f0ad3b333a835f45e109feb9edf761.zip | |
drm/amd/display: Compensate for XGMI SS downspread on dprefclk
[Why]
When XGMI is enabled, we need to adjust the dprefclk according to the
WAFL link's spread spectrum info. This is for VG20 (DCE121) only.
[How]
dce_clk_mgr already stores SS info, currently being used by audio clock.
Therefore, patch the clk_mgr's SS info with the xGMI SS info, if xGMI
is enabled. For display clock, adjust it during dce12_update_clocks()
before calling set_clock().
Since we rely on a mmhub register to reliably determine if xGMI is
enabled, the patching step needs to happen after resource_construct()
has initialized the hardware sequencer.
Signed-off-by: Leo Li <sunpeng.li@amd.com>
Reviewed-by: Hersen Wu <hersenxs.wu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c')
0 files changed, 0 insertions, 0 deletions