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authorRaju Rangoju <Raju.Rangoju@amd.com>2021-12-20 19:24:27 +0530
committerJakub Kicinski <kuba@kernel.org>2021-12-20 18:42:39 -0800
commit2d4a0b79dc6194048f7aa49c38d827cd5b7db6f1 (patch)
treece5912d5ad3bc9b77c1a19165a78241c1fc0c241 /drivers/fpga/fpga-bridge.c
parentdbb6c58b5a61d0c26a3da65ebb728727c305c3a1 (diff)
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net: amd-xgbe: Alter the port speed bit range
Newer generation Hardware uses the slightly different port speed bit widths, so alter the existing port speed bit range to extend support to the newer generation hardware while maintaining the backward compatibility with older generation hardware. The previously reserved bits are now being used which then requires the adjustment to the BIT values, e.g.: Before: PORT_PROPERTY_0[22:21] - Reserved PORT_PROPERTY_0[26:23] - Supported Speeds After: PORT_PROPERTY_0[21] - Reserved PORT_PROPERTY_0[26:22] - Supported Speeds To make this backwards compatible, the existing BIT definitions for the port speeds are incremented by one to maintain the original position. Co-developed-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Shyam Sundar S K <Shyam-sundar.S-k@amd.com> Signed-off-by: Raju Rangoju <Raju.Rangoju@amd.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Diffstat (limited to 'drivers/fpga/fpga-bridge.c')
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