From b1d128689f9c602a3dbea37b47a27a568d55754d Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Fri, 5 Jan 2018 10:25:57 -0500 Subject: drm/amdgpu: adjust HDP write queue flushing for tlb invalidation MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Separate tlb invalidation and hdp flushing and move the HDP flush to the caller. Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c') diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c index 0a4f34afaaaa..d0617f1c252f 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gart.c @@ -247,6 +247,7 @@ int amdgpu_gart_unbind(struct amdgpu_device *adev, uint64_t offset, } } mb(); + amdgpu_asic_flush_hdp(adev); amdgpu_gart_flush_gpu_tlb(adev, 0); return 0; } @@ -329,6 +330,7 @@ int amdgpu_gart_bind(struct amdgpu_device *adev, uint64_t offset, return r; mb(); + amdgpu_asic_flush_hdp(adev); amdgpu_gart_flush_gpu_tlb(adev, 0); return 0; } -- cgit