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path: root/drivers/pci/controller/dwc
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2022-01-07PCI: keystone: Use phandle argument from ↵Kishon Vijay Abraham I
"ti,syscon-pcie-id"/"ti,syscon-pcie-mode" Get "syscon" pcie_mode and pcie_id offset from the argument of "ti,syscon-pcie-id" and "ti,syscon-pcie-mode" phandle respectively. Previously a subnode to "syscon" node was added which has the exact memory mapped address of pcie_mode and pcie_id but now the offset of pcie_mode and pcie_id within "syscon" is now being passed as argument to "ti,syscon-pcie-id" and "ti,syscon-pcie-mode" phandle. If the offset is not provided in "ti,syscon-pcie-id"/"ti,syscon-pcie-mode", the full memory mapped address of pcie_ctrl is used in order to maintain old DT compatibility. Similar change for J721E is as discussed in [1] [1] -> http://lore.kernel.org/r/CAL_JsqKiUcO76bo1GoepWM1TusJWoty_BRy2hFSgtEVMqtrvvQ@mail.gmail.com Link: https://lore.kernel.org/r/20211126083119.16570-3-kishon@ti.com Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2022-01-05PCI: layerscape: Change to use the DWC common link-up check functionHou Zhiqiang
The current Layerscape PCIe driver directly uses the physical layer LTSSM code to check the link-up state, which treats the > L0 states as link-up. This is not correct, since there is not explicit map between link-up state and LTSSM. So this patch changes to use the DWC common link-up check function. Link: https://lore.kernel.org/r/20211224094000.8513-1-Zhiqiang.Hou@nxp.com Signed-off-by: Hou Zhiqiang <Zhiqiang.Hou@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
2022-01-04PCI: qcom-ep: Constify static dw_pcie_ep_opsRikard Falkeborn
The only usage of pci_ep_ops is to assign its address to the ops field in the dw_pcie_ep struct which is a pointer to const struct dw_pcie_ep_ops. Make it const to allow the compiler to put it in read-only memory. Link: https://lore.kernel.org/r/20211204220316.88655-1-rikard.falkeborn@gmail.com Signed-off-by: Rikard Falkeborn <rikard.falkeborn@gmail.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2022-01-03PCI: spear13xx: Avoid invalid address space conversionsBjorn Helgaas
The sparse checker complains about converting pointers between address spaces. We correctly stored an __iomem pointer in struct spear13xx_pcie, but discarded the __iomem when extracting app_base, causing one warning. Then we passed the non-__iomem pointer to writel(), which expects an __iomem pointer, causing another warning. Add the appropriate annotations. The sparse warnings look like this: $ make C=2 drivers/pci/controller/ drivers/pci/controller/dwc/pcie-spear13xx.c:72:54: warning: incorrect type in initializer (different address spaces) drivers/pci/controller/dwc/pcie-spear13xx.c:72:54: expected struct pcie_app_reg *app_reg drivers/pci/controller/dwc/pcie-spear13xx.c:72:54: got void [noderef] __iomem *app_base drivers/pci/controller/dwc/pcie-spear13xx.c:78:26: warning: incorrect type in argument 2 (different address spaces) drivers/pci/controller/dwc/pcie-spear13xx.c:78:26: expected void volatile [noderef] __iomem *addr drivers/pci/controller/dwc/pcie-spear13xx.c:78:26: got unsigned int * Link: https://lore.kernel.org/r/20211223213749.1314142-3-helgaas@kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Pratyush Anand <pratyush.anand@gmail.com>
2022-01-03PCI: hisi: Avoid invalid address space conversionsBjorn Helgaas
The sparse checker complains about converting pointers between address spaces. The pci_config_window.priv pointer is a generic void *, but hisi_pcie_map_bus() needs a void __iomem *. This isn't a problem in other drivers because they store the __iomem pointer in a driver struct. Add a trivial struct hisi_pcie to avoid the warning. The sparse warning looks like this: $ make C=2 drivers/pci/controller/ drivers/pci/controller/dwc/pcie-hisi.c:61:37: warning: incorrect type in initializer (different address spaces) drivers/pci/controller/dwc/pcie-hisi.c:61:37: expected void [noderef] __iomem *reg_base drivers/pci/controller/dwc/pcie-hisi.c:61:37: got void *priv Link: https://lore.kernel.org/r/20211223213749.1314142-2-helgaas@kernel.org Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Zhou Wang <wangzhou1@hisilicon.com>
2022-01-03PCI: uniphier: Rename uniphier_pcie_priv to uniphier_pcieFan Fei
Rename struct uniphier_pcie_priv to uniphier_pcie to match the convention of <driver>_pcie. No functional change intended. [bhelgaas: drop extraneous uniphier_pcie_irq_ack() from patch] Link: https://lore.kernel.org/r/20211223011054.1227810-21-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Cc: Masami Hiramatsu <mhiramat@kernel.org>
2022-01-03PCI: tegra194: Rename tegra_pcie_dw to tegra194_pcieFan Fei
Rename tegra_pcie_dw to tegra194_pcie to match the convention of <driver>_pcie. No functional change intended. [bhelgaas: rename functions similarly] Link: https://lore.kernel.org/r/20211223011054.1227810-20-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Thierry Reding <thierry.reding@gmail.com> Cc: Jonathan Hunter <jonathanh@nvidia.com>
2022-01-03PCI: intel-gw: Rename intel_pcie_port to intel_pcieFan Fei
Rename struct intel_pcie_port to intel_pcie to match the convention of <driver>_pcie. No functional change intended. Link: https://lore.kernel.org/r/20211223011054.1227810-11-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Rahul Tanwar <rtanwar@maxlinear.com>
2022-01-03PCI: kirin: Prefer of_device_get_match_data()Fan Fei
The kirin driver only needs the device data, not the whole struct of_device_id. Use of_device_get_match_data() instead of of_match_device(). No functional change intended. [bhelgaas: commit log] Link: https://lore.kernel.org/r/20211223011054.1227810-8-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Xiaowei Song <songxiaowei@hisilicon.com> Cc: Binghui Wang <wangbinghui@hisilicon.com>
2022-01-03PCI: keystone: Prefer of_device_get_match_data()Fan Fei
The keystone driver only needs the device data, not the whole struct of_device_id. Use of_device_get_match_data() instead of of_match_device(). No functional change intended. [bhelgaas: commit log] Link: https://lore.kernel.org/r/20211223011054.1227810-7-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>
2022-01-03PCI: dra7xx: Prefer of_device_get_match_data()Fan Fei
The dra7xx driver only needs the device data, not the whole struct of_device_id. Use of_device_get_match_data() instead of of_match_device(). No functional change intended. [bhelgaas: commit log] Link: https://lore.kernel.org/r/20211223011054.1227810-6-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>
2022-01-03PCI: designware-plat: Prefer of_device_get_match_data()Fan Fei
The designware-plat driver only needs the device data, not the whole struct of_device_id. Use of_device_get_match_data() instead of of_match_device(). No functional change intended. [bhelgaas: commit log] Link: https://lore.kernel.org/r/20211223011054.1227810-5-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Cc: Jingoo Han <jingoohan1@gmail.com> Cc: Gustavo Pimentel <gustavo.pimentel@synopsys.com>
2022-01-03PCI: artpec6: Prefer of_device_get_match_data()Fan Fei
The artpec6 driver only needs the device data, not the whole struct of_device_id. Use of_device_get_match_data() instead of of_match_device(). No functional change intended. [bhelgaas: commit log] Link: https://lore.kernel.org/r/20211223011054.1227810-3-helgaas@kernel.org Signed-off-by: Fan Fei <ffclaire1224@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Jesper Nilsson <jesper.nilsson@axis.com>
2021-12-26PCI: imx: Add the imx8mm pcie supportRichard Zhu
i.MX8MM PCIe works mostly like the i.MX8MQ one, but has a different PHY and allows to output the internal PHY reference clock via the refclk pad. Add the i.MX8MM PCIe support based on the standalone PHY driver. Link: https://lore.kernel.org/r/1640312885-31142-2-git-send-email-hongxing.zhu@nxp.com Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com> Tested-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Richard Zhu <hongxing.zhu@nxp.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Tim Harvey <tharvey@gateworks.com>
2021-12-06PCI: qcom-ep: Remove surplus dev_err() when using platform_get_irq_byname()Krzysztof Wilczyński
There is no need to call the dev_err() function directly to print a custom message when handling an error from either the platform_get_irq() or platform_get_irq_byname() functions as both are going to display an appropriate error message in case of a failure. This change is as per suggestions from Coccinelle, e.g., drivers/pci/controller/dwc/pcie-qcom-ep.c:556:2-9: line 556 is redundant because platform_get_irq() already prints an error Related: https://lore.kernel.org/all/20210310131913.2802385-1-kw@linux.com/ https://lore.kernel.org/all/20200802142601.1635926-1-kw@linux.com/ Link: https://lore.kernel.org/r/20211027112931.37182-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-12-06PCI: qcom: Use __be16 type to store return value from cpu_to_be16()Manivannan Sadhasivam
cpu_to_be16() returns __be16 value but the driver uses u16 and that's incorrect. Fix it by using __be16 as the data type of bdf_be variable. The issue was spotted by the below sparse warning: sparse warnings: (new ones prefixed by >>) >> drivers/pci/controller/dwc/pcie-qcom.c:1305:30: sparse: sparse: incorrect type in initializer (different base types) @@ expected unsigned short [usertype] bdf_be @@ got restricted __be16 [usertype] @@ drivers/pci/controller/dwc/pcie-qcom.c:1305:30: sparse: expected unsigned short [usertype] bdf_be drivers/pci/controller/dwc/pcie-qcom.c:1305:30: sparse: got restricted __be16 [usertype] Link: https://lore.kernel.org/r/20211130080924.266116-1-manivannan.sadhasivam@linaro.org Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Krzysztof Wilczyński <kw@linux.com>
2021-12-03treewide: Add missing includes masked by cgroup -> bpf dependencyJakub Kicinski
cgroup.h (therefore swap.h, therefore half of the universe) includes bpf.h which in turn includes module.h and slab.h. Since we're about to get rid of that dependency we need to clean things up. v2: drop the cpu.h include from cacheinfo.h, it's not necessary and it makes riscv sensitive to ordering of include files. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: Alexei Starovoitov <ast@kernel.org> Reviewed-by: Christoph Hellwig <hch@lst.de> Acked-by: Krzysztof Wilczyński <kw@linux.com> Acked-by: Peter Chen <peter.chen@kernel.org> Acked-by: SeongJae Park <sj@kernel.org> Acked-by: Jani Nikula <jani.nikula@intel.com> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Link: https://lore.kernel.org/all/20211120035253.72074-1-kuba@kernel.org/ # v1 Link: https://lore.kernel.org/all/20211120165528.197359-1-kuba@kernel.org/ # cacheinfo discussion Link: https://lore.kernel.org/bpf/20211202203400.1208663-1-kuba@kernel.org
2021-12-02PCI: dwc: Do not remap invalid resTim Harvey
On imx6 and perhaps others when pcie probes you get a: imx6q-pcie 33800000.pcie: invalid resource This occurs because the atu is not specified in the DT and as such it should not be remapped. Link: https://lore.kernel.org/r/20211101180243.23761-1-tharvey@gateworks.com Fixes: 281f1f99cf3a ("PCI: dwc: Detect number of iATU windows") Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org> Acked-by: Richard Zhu <hongxing.zhu@nxp.com> Cc: Richard Zhu <hongxing.zhu@nxp.com>
2021-11-29PCI: qcom: Fix an error handling path in 'qcom_pcie_probe()'Christophe JAILLET
If 'of_device_get_match_data()' fails, previous 'pm_runtime_get_sync()/ pm_runtime_enable()' should be undone. To fix it, the easiest is to move this block of code before the memory allocations and the pm_runtime_xxx calls. Link: https://lore.kernel.org/r/4d03c636193f64907c8dacb17fa71ed05fd5f60c.1636220582.git.christophe.jaillet@wanadoo.fr Fixes: b89ff410253d ("PCI: qcom: Replace ops with struct pcie_cfg in pcie match data") Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
2021-11-18PCI: keystone: Use PCI_ERROR_RESPONSE to identify config read errorsNaveen Naidu
Include PCI_ERROR_RESPONSE along with 0xffffffff in the comment about identifying config read errors. This makes checks for config read errors easier to find. Comment change only. Link: https://lore.kernel.org/r/6ae6b071d92052dc511407513e2a7c0035aff9e7.1637243717.git.naveennaidu479@gmail.com Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-11-18PCI: kirin: Drop error data fabrication when config read failsNaveen Naidu
If config pci_ops.read() methods return failure, the PCI_OP_READ() and PCI_USER_READ_CONFIG() wrappers use PCI_SET_ERROR_RESPONSE() to set the data value, so there's no need to set it in the pci_ops.read() methods themselves. Drop the unnecessary data value fabrication when pci_ops.read() fails. Link: https://lore.kernel.org/r/f87e22bc09a471d2cf15ad05dfd6432f57739aed.1637243717.git.naveennaidu479@gmail.com Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-11-18PCI: histb: Drop error data fabrication when config read failsNaveen Naidu
If config pci_ops.read() methods return failure, the PCI_OP_READ() and PCI_USER_READ_CONFIG() wrappers use PCI_SET_ERROR_RESPONSE() to set the data value, so there's no need to set it in the pci_ops.read() methods themselves. Drop the unnecessary data value fabrication when pci_ops.read() fails. Link: https://lore.kernel.org/r/7da7ea760abc5f85cad6e9b0d3e59eebd93f50d3.1637243717.git.naveennaidu479@gmail.com Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-11-18PCI: exynos: Drop error data fabrication when config read failsNaveen Naidu
If config pci_ops.read() methods return failure, the PCI_OP_READ() and PCI_USER_READ_CONFIG() wrappers use PCI_SET_ERROR_RESPONSE() to set the data value, so there's no need to set it in the pci_ops.read() methods themselves. Drop the unnecessary data value fabrication when pci_ops.read() fails. Link: https://lore.kernel.org/r/765c2f27d85fcee4eb137023dc0a8f864eee9e36.1637243717.git.naveennaidu479@gmail.com Signed-off-by: Naveen Naidu <naveennaidu479@gmail.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
2021-11-05Merge branch 'remotes/lorenzo/pci/qcom'Bjorn Helgaas
- Add Qualcomm PCIe Endpoint controller driver and DT binding (Manivannan Sadhasivam) - Add qcom struct for device-specific details in match data (Prasad Malisetty) - Switch pcie_1_pipe_clk_src from TCXO to pipe clock after PHY init in SC7280 (Prasad Malisetty) - Add .compatible device ID for SC8180x platform (Bjorn Andersson) * remotes/lorenzo/pci/qcom: PCI: qcom: Add sc8180x compatible PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280 PCI: qcom: Replace ops with struct pcie_cfg in pcie match data MAINTAINERS: Add entry for Qualcomm PCIe Endpoint driver and binding PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driver dt-bindings: PCI: Add Qualcomm PCIe Endpoint controller
2021-11-05Merge branch 'pci/host/kirin'Bjorn Helgaas
- Reorganize to separate out PHY logic (Mauro Carvalho Chehab) - Add support for external PHY in addition to the internal PHY (Mauro Carvalho Chehab) - Use regmap so both kirin driver and PHY can access APB registers (Mauro Carvalho Chehab) - Add support for per-lane PERST# GPIOs on HiKey970 external PEX 8606 PCI bridge (Mauro Carvalho Chehab) - Add "hisilicon,kirin970-pcie" compatible string (Mauro Carvalho Chehab) - Add MODULE_* macros (Mauro Carvalho Chehab) - Allow building as a module (Mauro Carvalho Chehab) - Add power_off support for Kirin 960 PHY (Mauro Carvalho Chehab) - Disable clkreq during poweroff sequence (Mauro Carvalho Chehab) - De-init the dwc driver during remove (Mauro Carvalho Chehab) - Allow removal of kirin driver (Mauro Carvalho Chehab) * pci/host/kirin: PCI: kirin: Allow removing the driver PCI: kirin: De-init the dwc driver PCI: kirin: Disable clkreq during poweroff sequence PCI: kirin: Move the power-off code to a common routine PCI: kirin: Add power_off support for Kirin 960 PHY PCI: kirin: Allow building it as a module PCI: kirin: Add MODULE_* macros PCI: kirin: Add Kirin 970 compatible PCI: kirin: Support PERST# GPIOs for HiKey970 external PEX 8606 bridge PCI: kirin: Use regmap for APB registers PCI: kirin: Add support for a PHY layer PCI: kirin: Reorganize the PHY logic inside the driver
2021-11-05Merge branch 'remotes/lorenzo/pci/imx6'Bjorn Helgaas
- Remove unused assignment (Krzysztof Wilczyński) * remotes/lorenzo/pci/imx6: PCI: imx6: Remove unused assignment to variable ret
2021-11-04PCI: kirin: Allow removing the driverMauro Carvalho Chehab
Now that everything is in place at the poweroff sequence, this driver can use module_platform_driver(), which allows it to be removed. Link: https://lore.kernel.org/r/53b40494252444a9b830827922c4e3a301b8f863.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04PCI: kirin: De-init the dwc driverMauro Carvalho Chehab
The logic under .remove ops is missing a call to dw_pcie_host_deinit(). Add it, in order to allow the DWC core to be properly cleaned up. Link: https://lore.kernel.org/r/838621e1c84ebaac153ccd9c36ea5e1254c61ead.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04PCI: kirin: Disable clkreq during poweroff sequenceMauro Carvalho Chehab
The logic at kirin_pcie_gpio_request() enables some clkreq GPIO lines. Disable them during power-off. Link: https://lore.kernel.org/r/f403e590843de1a581cade2d534d34715706f54e.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04PCI: kirin: Move the power-off code to a common routineMauro Carvalho Chehab
Instead of having two copies of the same logic, place the power-off logic in a separate function. No functional changes. Link: https://lore.kernel.org/r/64f6e8da3e5fff38b6c8fcb208ace46efe6555bb.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04PCI: kirin: Add power_off support for Kirin 960 PHYMauro Carvalho Chehab
In order to prepare for module unload, add a power_off method for HiKey 960. Link: https://lore.kernel.org/r/b095818b0d7fadae4cae200f481caf7a66e61fb4.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04PCI: kirin: Allow building it as a moduleMauro Carvalho Chehab
There's nothing preventing this driver from being loaded as a module. Change its config from bool to tristate. Link: https://lore.kernel.org/r/b5e7cfe9df09b492750bd6db0f0c911eaae8c2d4.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04PCI: kirin: Add MODULE_* macrosMauro Carvalho Chehab
This driver misses the MODULE_* macros. Add them. Link: https://lore.kernel.org/r/f7a951d0c2009f5765214fc2e83e24cf41585023.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04PCI: kirin: Add Kirin 970 compatibleMauro Carvalho Chehab
Now that everything is in place, add a compatible for Kirin 970. Link: https://lore.kernel.org/r/ac8c730c0300b90d96bdaaf387d458d8949241a9.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-04PCI: kirin: Support PERST# GPIOs for HiKey970 external PEX 8606 bridgeMauro Carvalho Chehab
On HiKey970, there's a PEX 8606 PCI bridge on its PHY with 6 lanes. Only 4 lanes are connected: lane 0 - connected to Kirin 970 (upstream) lane 4 - M.2 slot lane 5 - mini PCIe slot lane 6 - on-board Ethernet controller Each lane has its own PERST# GPIO pin and needs a clock request. Add support to parse a DT schema containing the above data. HiKey 970 requires a little more waiting time for the PCI bridge - which is outside the SoC - to finish the PERST# reset, and then initialize the eye diagram. Increase the waiting time for the PERST# signals accordingly. [bhelgaas: squash refcount fix from Wan Jiabing <wanjiabing@vivo.com>: https://lore.kernel.org/r/20211103062518.25695-1-wanjiabing@vivo.com and drop "parent" refcount per https://lore.kernel.org/all/20211103143059.GA683503@bhelgaas/] Link: https://lore.kernel.org/r/bb391a0e0f0863b66e645048315fab1a4f63f277.1634812676.git.mchehab+huawei@kernel.org Link: https://lore.kernel.org/all/9a365cffe5af9ec5a1f79638968c3a2efa979b65.1634622716.git.mchehab+huawei@kernel.org/ Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>
2021-11-02PCI: kirin: Use regmap for APB registersMauro Carvalho Chehab
The PHY layer need to access APB registers too, for Kirin 970. So place them into a named regmap. Link: https://lore.kernel.org/r/daf0e4bda5a69a5ac8484e70f09351a959805c8c.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-02PCI: kirin: Add support for a PHY layerMauro Carvalho Chehab
The pcie-kirin driver contains both PHY and generic PCI driver. The best would be, instead, to support a PCI PHY driver, making the driver more generic. However, it is too late to remove the Kirin 960 PHY, as a change like that would make the DT schema incompatible with past versions. So, add support for an external PHY driver without removing the existing Kirin 960 PHY from it. Link: https://lore.kernel.org/r/f38361df2e9d0dc5a38ff942b631f7fef64cdc12.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Kishon Vijay Abraham I <kishon@ti.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com>
2021-11-02PCI: kirin: Reorganize the PHY logic inside the driverMauro Carvalho Chehab
The pcie-kirin PCIe driver contains internally a PHY interface for Kirin 960. As the next patches will add support for using an external PHY driver, reorganize the driver in a way that the PHY part will be self-contained. This could be moved to a separate PHY driver, but a change like that would mean a non-backward-compatible DT schema change. Link: https://lore.kernel.org/r/ad2f4aa6bbb71d5c9af0139704672f75f12644fc.1634812676.git.mchehab+huawei@kernel.org Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Xiaowei Song <songxiaowei@hisilicon.com> Cc: Kishon Vijay Abraham I <kishon@ti.com>
2021-10-15PCI: uniphier: Serialize INTx masking/unmasking and fix the bit operationKunihiko Hayashi
The condition register PCI_RCV_INTX is used in irq_mask() and irq_unmask() callbacks. Accesses to register can occur at the same time without a lock. Add a lock into each callback to prevent the issue. And INTX mask and unmask fields in PCL_RCV_INTX register should only be set/reset for each bit. Clearing by PCL_RCV_INTX_ALL_MASK should be removed. INTX status fields in PCL_RCV_INTX register only indicates each INTX interrupt status, so the handler can't clear by writing 1 to the field. The status is expected to be cleared by the interrupt origin. The ack function has no meaning, so should remove it. Suggested-by: Pali Rohár <pali@kernel.org> Link: https://lore.kernel.org/r/1631924579-24567-1-git-send-email-hayashi.kunihiko@socionext.com Fixes: 7e6d5cd88a6f ("PCI: uniphier: Add UniPhier PCIe host controller support") Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Pali Rohár <pali@kernel.org> Acked-by: Marc Zyngier <maz@kernel.org>
2021-10-15PCI: qcom: Add sc8180x compatibleBjorn Andersson
The SC8180x platform comes with 4 PCIe controllers, typically used for things such as NVME storage or connecting a SDX55 5G modem. Add a compatible for this, that just reuses the 1.9.0 ops. Link: https://lore.kernel.org/linux-arm-msm/20210725040038.3966348-4-bjorn.andersson@linaro.org/ Link: https://lore.kernel.org/r/20210823154958.305677-2-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> [lorenzo.pieralisi@arm.com: updated match data structure] Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
2021-10-14PCI: qcom: Switch pcie_1_pipe_clk_src after PHY init in SC7280Prasad Malisetty
On the SC7280, the clock source for gcc_pcie_1_pipe_clk_src must be the TCXO while gdsc is enabled. After PHY init successful clock source should switch to pipe clock for gcc_pcie_1_pipe_clk_src. Link: https://lore.kernel.org/r/1633628923-25047-6-git-send-email-pmaliset@codeaurora.org Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
2021-10-14PCI: qcom: Replace ops with struct pcie_cfg in pcie match dataPrasad Malisetty
Add struct qcom_pcie_cfg as match data for all platforms. Assign appropriate platform ops into struct qcom_pcie_cfg and read using of_device_get_match_data() in qcom_pcie_probe(). Link: https://lore.kernel.org/r/1633628923-25047-5-git-send-email-pmaliset@codeaurora.org Signed-off-by: Prasad Malisetty <pmaliset@codeaurora.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Stephen Boyd <swboyd@chromium.org>
2021-10-12PCI: dwc: Perform host_init() before registering msiBjorn Andersson
On the Qualcomm sc8180x platform the bootloader does something related to PCI that leaves a pending "msi" interrupt, which with the current ordering often fires before init has a chance to enable the clocks that are necessary for the interrupt handler to access the hardware. Move the host_init() call before the registration of the "msi" interrupt handler to ensure the host driver has a chance to enable the clocks. The assignment of the bridge's ops and child_ops is moved along, because at least the TI Keystone driver overwrites these in its host_init callback. Link: https://lore.kernel.org/r/20210823154958.305677-1-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Reviewed-by: Rob Herring <robh@kernel.org>
2021-10-11PCI: qcom-ep: Add Qualcomm PCIe Endpoint controller driverManivannan Sadhasivam
Add driver for Qualcomm PCIe Endpoint controller based on the DesignWare core with added Qualcomm-specific wrapper around the core. The driver support is very basic such that it supports only enumeration, PCIe read/write, and MSI. There is no ASPM and PM support for now but these will be added later. The driver is capable of using the PERST# and WAKE# side-band GPIOs for operation and written on top of the DWC PCI framework. [bhelgaas: wrap a few long lines] Co-developed-by: Siddartha Mohanadoss <smohanad@codeaurora.org> [mani: restructured the driver and fixed several bugs for upstream] Link: https://lore.kernel.org/r/20210920065946.15090-3-manivannan.sadhasivam@linaro.org Signed-off-by: Siddartha Mohanadoss <smohanad@codeaurora.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Rob Herring <robh@kernel.org>
2021-10-07PCI: visconti: Remove surplus dev_err() when using platform_get_irq_byname()Krzysztof Wilczyński
There is no need to call the dev_err() function directly to print a custom message when handling an error from either the platform_get_irq() or platform_get_irq_byname() functions as both are going to display an appropriate error message in case of a failure. This change is as per suggestions from Coccinelle, e.g., drivers/pci/controller/dwc/pcie-visconti.c:286:2-9: line 286 is redundant because platform_get_irq() already prints an error Related: https://lore.kernel.org/all/20210310131913.2802385-1-kw@linux.com/ https://lore.kernel.org/all/20200802142601.1635926-1-kw@linux.com/ Link: https://lore.kernel.org/r/20211007122848.3366-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-10-07PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_EP)Andy Shevchenko
The "depends on" Kconfig construct is a no-op in options that are selected and therefore has no effect. Remove it. Clean up the users of PCIE_DW_EP and introduce idiom depends on PCI_ENDPOINT select PCIE_DW_EP for all of them. Link: https://lore.kernel.org/r/20210623140103.47818-2-andriy.shevchenko@linux.intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-10-07PCI: dwc: Clean up Kconfig dependencies (PCIE_DW_HOST)Andy Shevchenko
The "depends on" Kconfig construct is a no-op in options that are selected and therefore has no effect. Remove it. Furthermore, there is no need to repeat menu dependencies (PCI). Clean up the users of PCIE_DW_HOST and introduce idiom depends on PCI_MSI_IRQ_DOMAIN select PCIE_DW_HOST for all of them. Link: https://lore.kernel.org/r/20210623140103.47818-1-andriy.shevchenko@linux.intel.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-10-05PCI: imx6: Remove unused assignment to variable retKrzysztof Wilczyński
Previously, the maximum link speed was set following an "fsl,max-link-speed" property read, and should the read failed, then the PCIe generation was manually set to PCIe Gen1 and thus limiting the link speed to 2.5 GT/s. Code refactoring completed in the commit 39bc5006501c ("PCI: dwc: Centralize link gen setting") changed to the logic that was previously used to limit the maximum link speed leaving behind an unused assignment to a variable "ret". Since the value returned from the of_property_read_u32() and stored in the variable "ret" is never used in any meaningful way, and it's also immediately reassigned in the code that follows, the assignment can be removed. Link: https://lore.kernel.org/r/20211003025439.84783-1-kw@linux.com Signed-off-by: Krzysztof Wilczyński <kw@linux.com> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
2021-09-30PCI: dra7xx: Get an optional clockLuca Ceresoli
If the clock is provided externally we need to make sure it is enabled before starting PCI scan. Link: https://lore.kernel.org/r/20210531085934.2662457-5-luca@lucaceresoli.net Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
2021-09-30PCI: dra7xx: Remove unused includeLuca Ceresoli
Unused since commit e259c2926c01 ("PCI: pci-dra7xx: Prepare for deferred probe with module_platform_driver"). Link: https://lore.kernel.org/r/20210531085934.2662457-4-luca@lucaceresoli.net Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Signed-off-by: Lorenzo Pieralisi <lorenzo.pieralisi@arm.com> Acked-by: Kishon Vijay Abraham I <kishon@ti.com>
generated by cgit (git 2.34.1) at 2025-06-10 21:47:27 +0000